In the modern mixed-signal SoC design cycle, designers are frequently tasked with detecting and diagnosing behavioral discrepancies between design descriptions given at different levels of hierarchy, e.g. behavioral vs. transistor level descriptions …
Technology scaling along with unprecedented levels of device integration has led to increasing numbers of analog/mixed-signal/RF design bugs escaping into silicon. Such bugs are manifested under specific system-on-chip (SoC) operating conditions and …
The proliferation of third-party silicon manufacturing has increased the vulnerability of integrated circuits to malicious insertion of hardware for the purpose of leaking secret information or even rendering the circuits useless while deployed in …
With trends in mixed-signal systems-on-chip indicating increasingly extreme scaling of device dimensions and higher levels of integration, the tasks of both design and device validation is becoming increasingly complex. Post-silicon validation of …
Due to the use of scaled technologies, high levels of integration and high speeds of today's mixed-signal SoCs, the problem of validating correct operation of the SoC under electrical bugs and that of debugging yield loss due to unmodeled …