Barry Muldrey is an expert AI/ML circuit-design-analysis and EDA executioner 😛
Did you know?
Barry had a short first-career in the music industry, working as a recording engineer and occasionally producer and studio musician.
While finishing his undergraduate, Barry launched a startup music recording technology company.
Barry holds a Ph.D. from the Georgia Institute of Technology where he researched novel applications of AI/ML to circuit model validation, model debugging, post-Si model validation, and automated testing of mixed-signal systems.
From 2019 to 2021, Barry was a junior professor at the University of Mississippi where he co-founded a B.S. Computer Engineering curriculum and degree program. There, he created several novel courses which gave students in-depth and hands-on experience with mobile phone SoC firmware design and hybrid IoT cloud system design and deployment.
From 2021 to the present, Barry is a Senior Engineer in Intel’s Server DDR (Analog IP) group where he enables advanced circuit and system simulation as well as conducts multi-abstraction gigascale-data analysis.
Barry’s hobbies include playing, recording, and performing music, woodcraft, and welding.
Ph.D. in Electrical and Computer Engineering, 2019
Georgia Institute of Technology
M.S. in Electrical and Computer Engineering, 2014
Georgia Institute of Technology
B.S. in Electrical Engineering, 2009
University of New Orleans
Xanity is an experimentation benchtop. Experiments are easily parameterized and chained into dataflow graphs. Experimental data and meta-data are transparently managed. System virtual environments are managed and made portable.
High operating speeds and use of aggressive fabrica- tion technologies necessitate validation of mixed-signal electronic systems at every stage of top-down design: behavioral to netlist to physical design to silicon. At each step, design validation establishes the equivalence of lower level design descriptions against their higher level specifications. In this paper, a novel reinforcement-learning guided stimulus generation algorithm is presented that excites behavioral differences in the statistics of observed responses between high and low-level descriptions of an analog/mixed-signal device (as opposed to the difference magnitude as in prior research). These discovered differences are learned using series-parallel interconnected machine learn- ing kernels appended to the device model and the process is repeated until no further differences can be excited via stimulus generation. The latter behavior difference learning is significantly facilitated by the proposed stimulus generation approach as opposed to prior research. We present the formulation of design validation as a Markov decision process and discuss a reward metric for reinforcement learning based on the statistics of observed device responses as discussed earlier. Integration of the proposed design validation methodology with deep-Q learning software and the suite of Cadence simulation tools is discussed. Validation results for selected design bugs in representative designs are presented and show the quality and efficiency of the proposed design validation methodology.
In the modern mixed-signal SoC design cycle, designers are frequently tasked with detecting and diagnosing behavioral discrepancies between design descriptions given at different levels of hierarchy, e.g. behavioral vs. transistor level descriptions or behavioral/transistor level descriptions vs. fabricated silicon. One problem is detection, to determine if behavioral differences between design descriptions exist. If such differences (anomalies) are detected, then diagnosis is concerned with identifying the module in a hierarchical design description of the system that is most likely the root cause of the anomaly (typically under the constraint that only the primary outputs of the top-level hierarchies are observed. Previously proposed machine-learning classifiers require prior knowledge about the kinds of likely design errors typically encountered. In this work, we present a novel technique for the algorithmic foundation of circuit diagnosis predictions which does not require any assumptions about the nature of design errors. Our method employs iterative and alternate on-the-fly test generation and least-squares fitting of embedded low-order nonlinear filters to produce a best-guess estimate of the root cause of the anomaly. Experiments are conducted on two test vehicles, an RF transceiver and a phase-locked loop, several bug models are implemented, and the system’s diagnosis predictions are analyzed.